ESD-MSD Mixed
Signal Design Cluster
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ESD-MSD Mixed
Signal Design Cluster
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| Presentations from the Course on CMOS Data Converters for Communications (Bellaterra, Barcelona, Spain; May 6-10, 2002) | |
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| Presentations from the Workshop on Mixed-Signal IP Blocks (DATE'2002, Paris, March 8, 2002) | |
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| Presentations from the Workshop on A/D Converters for Telecommunications (ETHZ, Pfäffikon, October 22, 2001) | |
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| Presentations from the Workshop on Substrate Effects in Smart-Power ICs (ESSDERC'2001, Nuremberg; September 14, 2001) | |
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| Presentations from the Workshop on Substrate Noise-Coupling in Mixed-Signal ICs (IMEC, Leuven; September 5-6, 2001) | |
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| Presentations from the Workshop on Mixed-Signal Design Tools (DATE-2001; March 12, 2001) | |
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| Presentations from the Workshop on Embedded Data Converters (ESSCIRC-2000; September 22, 2000) | |
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| Presentations from the Workshop on Substrate-Effects in Smart-Power and Mixed-Signal ICs (ESSDERC'2000; September 14, 2000) | |
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| Presentations from the Special Session on Mixed-Signal Testing (ETW'2000; May 23, 2000) | |
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| Presentations from the First ESD-MSD Test Workshop (DATE'2000; March 27, 2000) | |
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| ABACUS: Active Bus Adaptor and Controller for Remote Units | |
| Tutorial on IC Technology and Layout
(PDF, 128 kB)
Tutorial on Layout of Mixed-Signal Circuits (PDF, 469 kB) Design of a Mixed-Signal ASIC for Satellite OBDH Bus Presentation (PDF, 748 kB)Mixed-Signal Design Methodologies for Space Applications Presentation (PDF, 38 kB) |
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| BANDIT: Embedding Analof-to-Digital Converters on Digital Telecom ASICs | |
| D-1.4.2. Design Case Report About Noise
Coupling Analysis and Reduction Methodology PDF
(2905kB)
Additional related documents available from the BANDIT Web Page |
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| HIPADS: High-Performance Deep Submicron CMOS Analog-to-Digital Converters using Low-Noise Logic | |
| Paper at ISIC'2001 PDF
(240kB)
Implementation of High-Speed Continuous-Time Delta-Sigma Converters for Video Application PDF (1751kB) The Reduction of Switching Noise in Mixed-Signal Design Using Current-Steering Logic Course ZIP file (478 kB)Cell Edit: CAD tool for fast design of digital CMOS libraries (static logic and current-steering logic). Self-extracting compressed file (704 kB) Aslib: CAD tool for the design of optimal Current-Steering Logic libraries in term of power consumption and transistor area for a given frequency and load capacitance. Self-extracting compressed file (227 kB) |
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| MADBRIC: Mixed Analog-Digital Broadband IC for Internet Power-Line Data Synchronous Link | |
| DS2 Power-Line Communication Technology
PPT
(1689kB)
DS2 Design Flow for System-on-Chip including Mixed-Signal Design, PDF (177kB) 
Codesign HW/SW in High-Speed Communication Modems for Low-Voltage Pawer Lines, PDF (322kB)
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| MIXMODEST: Mixed Mode in Deep Submicron Technology | |
Elements Matching Requirements for Embedded Data Converters in an ADSL Communication System Paper (PDF, 75 kB)Design of High-Speed Analog-to-Digital Interface in Digital Technologies Paper (PDF, 197 kB)Design Considerations for High-Resolution Pipeline ADCs in Digital CMOS Technology Paper (PDF, 101 kB)A High-Performance Sigma-Delta ADC for ADSL Applications in 0,35 um CMOS Digital Technology Paper (PDF, 367 kB)Design Solutions for Low-Power Digital Filters Presentation (PDF, 724 kB) Low-Pass Sigma-Delta Modulators: Principles and Architectures Course presentation PDF file (16251 kB)Low-Pass Sigma-Delta Modulators: Continuous-Time Sigma-Delta Modulators Course presentation PDF file (2276 kB)Low-Pass Sigma-Delta Modulators: Errors in Discrete-Time Circuits Course presentation PDF file (2176 kB)Band-Pass Sigma-Delta Modulators: Principles, Architectures and Circuits Course presentation PDF file (4380 kB)Comparators: Parameters, Specifications, Architectures and Circuits Course presentation PDF file (819 kB) |
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| OPTIMISTIC: Optimization Methodologies in Mixed-Signal Testing of ICs | |
| Principles of A/D and D/A Mixed-Signal Testing
in the Context of the OPTIMISTIC Generic Device Testing, PDF
(2108kB)
Advancing State-of-the-Art Mixed-Signal Testing by Use of the OPTIMISTIC Approach, Paper at IMSTW'2002, PDF (2734kB)
Model Based Test Generation: A Means of Improving Test Quality and Time-to-Market in Mixed-Signal Test, Paper at IMSTW'2001, PDF (213kB)
Model Based Test Generation: A Means of Improving Test Quality and Time-to-Market in Mixed-Signal Test, Presentation at IMSTW'2001, PDF (800kB)
Panel on IP Demands for Mixed-Signal Testing: Validation Test Methodologies to Meet Mixed-Signal SoC Challenges, Presentation at Panel Session in IMSTW'2002, PDF (140kB)
Behavioral Test Generation Modeling Approach for Mixed-Signal IC Verification, Presentation at IMSTW'2002, PDF (387kB)
Behavioral Test Generation Modeling Approach for Mixed-Signal IC Verification, Paper at IMSTW'2002, PDF (93kB)
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| RAPID: Retargetability for Reusability of Application-Driven Quadrature D/A Interface Block Design | |
| D-3: Case-Study of Methodology for Design
Reusability PDF(481kB)
Demonstration of the Retargeting Methodology for Reuse Power Point presentation with voice transcript.Retargeting of Mixed-Signal Blocks for SoCsOffice 2000 version (ZIP file, 15 803 kB)See instructions for downloading and running. Paper at DATE'01. PDF(31 kB)A Complete Retargeting Methodology for Mixed-Signal IC Designs Paper at ECCTD'01. PDF(83 kB)Creating Flexible Analogue IP Blocks Paper at ESSCIRC'01. PDF(185 kB)Layout-constrained Retargeting of Analog Blocks Paper at DCIS'00. PDF(225 kB)RAPID: Retargetability for Reusability of Application-Driven Quadrature D/A Interface Block Design Paper at DCIS'99. PDF(106 kB)D-2: Design for Reusability Methodology. PDF(1231 kB) |
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| SUBSAFE: Substrate Current Safe Smart-Power IC Design Methodology | |
| D-6.2.1.6: Methodology for Substrate Current
Robust Design by Device and Circuit Simulation PDF
(4468 kB)
D-6.2.1.4: Methodology for Characterizing Substrate CurrentsPDF (1753 kB) D-6.2.1.5: Transient Minority Carrier Collection from the Substrate in Smart Power Design PDF (517 kB) D-6.2.1.1: Measurement Techniques of Substrate Currents; Exemplary Results. PDF (1595 kB) D-6.2.1.2: Simulation Results of Basic Structures. PDF (451 kB) D-6.2.1.3: Report on Methodology for Characterizing Substrate Current
on Test Chip I. PDF (1054
kB)
The reports above are good accompanying texts for the SUBSAFE presentations in the Substrate-Current Effects Workshop |
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| SYSCONV: Systematic Top-Down Design and System Modeling of Oversampling Converters | |
| DAISY Tutorial PDF
(415kB)
DAISY is a software tool for high-level simulation of Delta-Sigma Converters. A Web-accessible limited demonstration version is available. Selection of the Simulation Approach for Sigma-Delta Modulators PDF (57kB) D-3.1.1: Multibit Oversampling D/A Converters Using Dynamic Element Matching Methods. PDF (354 kB) D-2.2.1: Optimized topologies for multibit oversampling A/D converters. PostScript (1689 kB) D-1.2.1: Basic concepts of oversampling converter models. PDF (142 kB) D-1.1.1: Analysis of major nonidealities of multibit oversampling converters. PDF (228 kB) D-2.1.1: Guidelines for implementation of CMOS multibit oversampling
modulators. PDF (1074 kB),
PostScript
(4959 kB)
Additional information can be found at the SYSCONV Web Page |
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| TERMIS: High-Temperature / High-Voltage Mixed-Signal SOI ASICs for Aerospace Applications | |
| SOI Hall Plate Characterization. PDF
(177 kB)
User Manual for Hall Sensor Demonstration Kit. PDF(239 kB)
Links to information on X-FAB SOI Technology: X-FAB Home PageD-2.3: Hall Sensor Implementation. PDF (1100 kB)
D-2.2: Power Bridge for High-Temperature Applications in Partially Depleted 1.0um - SOI CMOS Technology. PDF (1245 kB)
System Design Considerations for Motor Controller. PPT presentation as compressed ZIP file (804 kB)
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| VDP: Video Decoder Platform | |
| Management Story Book. PDF
(136 kB)
Digital Signal Processing: Short and Simple.HTML document as compressed ZIP file (1792 kB) Make sure the "Use folder names" option is selected when extracting the files. An Introduction to Low-Voltage, Low-Power Analog CMOS Design.PDF (344 kB) The course is suitable for professional designers of analog circuits and graduate engineers wishing to acquire knowledge in this area. Course on Sigma-Delta Converters. PDF (107 kB) |
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Last update: October 29, 2002